Field of the Disclosure
The present disclosure relates generally to processing systems and more particularly to prefetching for processing systems.
Description of the Related Art
To improve processing efficiency, a processor typically employs a prefetcher that moves data expected to be demanded by an executing program thread to a cache, where it can be more quickly accessed once needed. In order to identify the data that is expected to be demanded, the prefetcher analyzes memory access requests (“demand requests”) by the executing program thread to identify patterns in the memory addresses of the demand requests. An common type of prefetching based on patterns in the memory addresses of demand requests includes “stride prefetching,” whereby the prefetcher identifies patterns in the differences (“strides”) between memory addresses of successive demand requests and prefetches data based on the identified patterns.
In some processing systems, the executing program threads address memory based on a virtual address space, and an operating system (OS) executing at the processor maps the virtual address space to a set of physical addresses that identify memory locations in a memory hierarchy of the processing system. The physical addresses are typically organized into memory pages to facilitate efficient memory access. However, because sequential addresses in the virtual address space can refer to non-sequential memory pages in the physical address space, conventional prefetchers often are unable to properly identify memory access patterns for strides that cross memory page boundaries.